[PDF.51su] Digital VLSI Chip Design with Cadence and Synopsys CAD Tools

Digital VLSI Chip Design with Cadence and Synopsys CAD Tools

[PDF.ww14] Digital VLSI Chip Design with Cadence and Synopsys CAD Tools

Digital VLSI Chip Design  Erik Brunvand epub
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 | #621184 in Books |  2009-03-07 | Original language:English | PDF # 1 |  9.10 x1.20 x7.10l,1.90 | File type: PDF | 624 pages

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||0 of 0 people found the following review helpful.| Excellent practical resource for graduate student|By Masood Qazi|I wanted to implement a test chip with custom-design standard cell library elements. I wanted to take an RTL design and perform synthesis, backend (place and route), and top-level chip assembly (with other custom components) using a 0.13 um technology and an accompanying standard cell library. My background prior|From the Back Cover|Digital VLSI Chip Design with Cadence and Synopsys CAD Tools leads students through the complete process of building a ready-to-fabricate CMOS integrated circuit using popular commercial design software. Detailed tutorials include step

KEY BENEFIT: This hands-on book leads readers through the complete process of building a ready-to-fabricate CMOS integrated circuit using popular commercial design software. KEY TOPICS: The VLSI CAD flow described in this book uses tools from two vendors: Cadence Design Systems, Inc. and Synopsys Inc. Detailed tutorials include step-by-step instructions and screen shots of tool windows and dialog boxes. MARKET: A useful reference for chip designers.<...

You easily download any file type for your device.Digital VLSI Chip Design with Cadence and Synopsys CAD Tools   |  Erik Brunvand. I was recommended this book by a dear friend of mine.

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